1. Field of the Invention
The present invention relates to a semiconductor memory device and a method of testing the semiconductor memory device, and more particularly relates to a semiconductor memory device in which a partial array self refresh operation can be performed and a method of testing the semiconductor memory device.
2. Description of Related Art
As is widely known, a DRAM (Dynamic Random Access Memory), which is a representative semiconductor memory device, requires a periodic refresh operation to maintain data stored therein. The refresh operation includes a few types, such as an auto refresh operation that is performed every time a refresh command is issued from outside and a self refresh operation that is performed by internally generating a refresh signal in a periodic and automatic manner. Among these, the self refresh operation is a refresh operation performed at the time of standby, which requires an operation with low power consumption.
Among DRAMs, in a technical area in which low power consumption is strongly demanded, such as a product for a mobile application, an operation called “partial array self refresh” is supported, in which a self refresh operation is not performed on the whole memory cell array, but is performed only on predetermined areas. When a partial array self refresh operation is performed, because the refresh operation is omitted for areas in which data does not need to be maintained, it is possible to reduce the power consumption at the time of standby (see “Partial Array Self Refresh” Elpida Memory, Inc., Technical Note 2005).
It can be determined whether to perform a refresh operation for each area in a partial array self refresh operation by preparing a predetermined pattern in advance or specifying the area for each bank. An example of preparing a predetermined pattern in advance includes, for example, in a memory composed of banks 0 to 3, a case where three patterns are prepared including a pattern of refreshing the bank 0, a pattern of refreshing the banks 0 and 1, and a pattern of refreshing all the banks 0 to 3. An example of specifying the area for which the refresh operation is performed for each of the banks includes, for example, in a memory composed of banks 0 to 7, a case where the refresh operation can be specified for each of the banks 0 to 7. In this case, the pattern of specifying the area includes 255 (=28−1) patterns (“1” is subtracted from “28” because a pattern of specifying no banks is excluded).
It is tested by an operation test before shipment whether the partial array self refresh operation is properly functioning. In actual cases, because it is required to enter a self refresh mode for performing the test of the partial array self refresh operation, a test of one pattern takes a relatively long time (about 1 second). In the former example described above (three patterns), the total test time is about 3 seconds, which is not so problematic. However, in the latter example described above (255 patterns), the total test time becomes about 255 seconds, which means a non-negligible length of time has to be consumed.
Furthermore, in recent years, it is required to divide each of the banks into a plurality of segments and to specify the refresh operation for each of the segments. Assuming a configuration of 8 banks×8 segments, because the pattern includes 255 (=28−1) patterns for the banks and 255 (=28−1) patterns for the segments, the total number of patterns becomes 65025 (=2552). As a result, the total test time becomes about 65025 seconds (about 18 hours), which is an unrealistic length of time as a test time in mass production.
As described above, in a conventional semiconductor memory device in which a partial array self refresh operation can be performed, it takes a longer time to test the operation if the area for which the refresh operation is performed is specified in a finely divided manner. The time required to test the operation is not only a problem limited in DRAMs but also a problem occurring in all types of semiconductor memory devices that require a refresh operation to maintain date stored therein.